FIG. 7(a) is a schematic perspective view exemplarily showing a conventional lead type discrete component 1. FIG. 7(b) is a schematic perspective view exemplarily showing a surface mount semiconductor device 10 that has recently been developed.
In association with increasing an operational speed of a semiconductor switching device, it is necessary to reduce parasitic inductance of the device itself. Unlike the conventional discrete component 1 (for example, a lead type IGBT) as shown in FIG. 7(a), the semiconductor device 10 as shown in FIG. 7(b), for example, has a very high switching speed. Thus, thinning of its device package has progressed so as to realize the smallest possible parasitic inductance.
As shown in FIG. 7(b), such a semiconductor device 10 is housed in an ultra-thin package 11, and has, for example, an electrical bonding surface 11a and a heat dissipation surface 11b on the opposite side. On the electrical bonding surface 11a, at least one electrode (terminal) 12 that is electrically connected to a substrate is disposed. On the heat dissipation surface 11b, a large electrode 13 that also serves to dissipate heat is disposed. When the semiconductor device 10 is mounted, it is necessary to have an excellent heat dissipation as well as an excellent insulation reliability. For this purpose, techniques have been proposed as disclosed in, for example, Patent Documents 1 to 3.